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11/12/2024
AUDITÓRIO I (INFERIOR) ENGENHARIA QUÍMICA

Desenvolvimento do núcleo de um simulador web para a arquitetura RISC-V
Eduardo M. D. Souza, Thiago H. Rausch, Cesar A. Zeferino, Douglas R. Melo
A simulation-based Python EDA tool for customized digital cell design
R. Journois, L. Compassi-Severo, O. Saotome
Implementação em FPGA de um polinômio de memória com atrasos baseados em médias móveis
Vitória Mariana da Rocha Gasino, Maria Eduarda Rizo, Sibilla Batista da Luz França, Eduardo Gonçalves de Lima
Ferramenta para interconexão de múltiplos núcleos em sistemas integrados
Thiago H. Rausch, Eduardo M. D. Souza, Wesley Grignani, Douglas R. Melo
Pré-distorcedor digital descrito em linguagem VHDL e baseado em polinômio com memória
Leonardo de Andrade Santos, Sibilla Batista da Luz Franca, Eduardo Gonçalves de Lima

Modelagem matemática de amplificadores de potência usando ordens polinomiais esparsas
Maria Eduarda Rizo, Eduardo Gonçalves de Lima
Modelagem comportamental em banda base com deslocamentos em frequência no entorno da portadora
Carlos André Marques Schulze Júnior, Eduardo Gonçalves de Lima
Análise de polarização de um amplificador de potência cascode CMOS com foco em performance para dispositivos móveis
Bernardo Paixão Correa, Bernardo Leite
Análise dos efeitos da saturação do DPD de banda dupla concorrente
Luís Otávio Lidoni Miliavacca, Luis Schuartz
Modelagem de amplificadores multimodos usando regressão linear e polinômio de memória
Eloiza Arandia Bruschi, Eduardo Gonçalves de Lima

Modelagem comportamental de sistema de transferência de energia sem fio por RF para aplicações de IoT sem bateria: uma abordagem resumida
P. C. Lacerda, A. A. Mariano, G. Brante, O. L. A. López, K. Mikhaylov, R. D. Souza
Projeto de circuito de energy harvesting de RF em 2,4GHz em tecnologia CMOS 65nm
André Soie dos Santos Kaio, Sandro Binsfeld Ferreira
Energy beamforming design with the bat algorithm for RF wireless power transfer with dynamic metasurface antennas
Ricardo Souza Senandes, Glauber Brante, Richard Demo Souza
Space-division multiple access-based energy beamforming for IoT devices
Lucas Jurgen Klein da Silva, Ana Beatriz Rodrigues de Mattos Ronchi, Glauber Brante, Richard Demo Souza
Projeto de rectena para sistema de transferência de energia sem fio por rádio frequência
P. C. Lacerda, P. Wittevrongel, A. A. Mariano

Aproximação da resistência interna de baterias de chumbo-ácido utilizando mínimos quadrados
Matheus de B. Ferreira, Luis Schuartz, André A. Mariano
Modelagem de amplificadores usando polinômios de memória da entrada original e da diferença entre entradas em instantes consecutivos
Maria Eduarda Negrelli de Araujo, Sibilla Batista da Luz França, Eduardo Gonçalves de Lima
Perceptron linear aplicado na modelagem de circuitos elétricos
Manuela Bonatto Xavier da Silveira, Sibilla Batista da Luz França, Eduardo Gonçalves de Lima
Análise CA de circuitos contendo elementos passivos de ordem fracionária
Amanda Emanuele Gouvea Morente, Eduardo Gonçalves de Lima

12/12/2024
AUDITÓRIO I (INFERIOR) ENGENHARIA QUÍMICA

8h30

The Internet of Things (IoT) is rapidly transforming industries, presenting new challenges for future communication systems. As IoT applications expand, future networks must support extreme connectivity, flexibility, and scalability, while also addressing conflicting requirements such as low latency and high reliability, depending on the specific IoT use case. One of the most demanding IoT scenarios is 'massive IoT,' where a vast number of low-power, low-complexity devices need to communicate with stringent spectral efficiency requirements. In such environments, network congestion becomes a major concern due to the large volume of devices, making traditional coordination methods challenging. Recently, various robust protocols have been developed to facilitate medium access and support the sharing of network resources among multiple users. However, a significant issue in this context is that traditional metrics, such as latency and delay, do not adequately address time-sensitive constraints. This is where the Age of Information (AoI) comes into play. AoI measures the freshness of the data at the base station (BS) by tracking the time elapsed since the most recent data update was received, providing a more precise view of the network's performance from a 'freshness' perspective.
Jamil Farhat received the B.Sc., M.Sc., and D.Sc. degrees in Electrical Engineering from the Federal University of Technology – Paraná (UTFPR), Curitiba, Brazil, in 2013, 2015, and 2018, respectively. He is currently a Professor at UTFPR and a member of the Wireless Communications Systems group at the same institution. His research interests include various areas of wireless communication systems, such as cooperative communications, multiple access strategies, physical layer security, and machine-type communications. In recognition of his contributions, he received the 2023 Reviewer Appreciation Award from the IEEE Communications Society for his work with IEEE Wireless Communications Letters.

10h

This talk will discuss how the Machine Learning and the Circuits & Systems (CAS) fields can benefit from each other. The main concepts of Machine Learning will be presented and put into context with the underlying processing requirements involved. Then, we will cover two approaches to address issues in these fields: Machine Learning for CAS, where we discuss learning-based solutions applied to EDA, and CAS for Machine Learning, showing that Approximate Computing can enable the widespread employment of these circuits. We close this talk by pointing out some of the challenges still open to investigation.
Mateus Grellert received the M.Sc. degree in Computer Science from the Federal University of Rio Grande do Sul (UFRGS), Brazil, in 2014, and the Ph.D. degree at the same University in 2018. He is an Assistant Professor at the Federal University of Rio Grande do Sul, Brazil, and part of the Microelectronics Group (GME) of the same University. He has been doing research in embedded systems solutions for more than 10 years. He has over 100 published works including topics like complexity-aware machine learning and image processing, hardware design for machine learning and video processing, approximate computing, memory-aware and energy-aware design, and efficient video-coding systems. His current research interests involve efficient algorithms and architectures for machine learning, as well as efficient architectures for video and image compression in constrained, embedded applications. Prof. Grellert is also the chair of the IEEE Circuits and Systems Society Rio Grande do Sul Chapter (CASS-RS), member of the SBC Special Committee on Integrated Circuit Design (CECCI) on and a member of the Brazilian Committee on Audio, Image, Multimedia and Hypermedia Coding.

11h15

In general, people are well aware of what a mobile phone is capable of doing; however, on the other hand, they tend to know little about how the phone actually achieves those functions. Since cutting-edge smartphones are always manufactured with the most advanced techniques and components of their time, studying them is both educational and interesting, especially for those in the fields of electronics and related areas. One of the key factors in the transition from “phone” to “smartphone” (in 2007) was MEMS (Micro Electro-Mechanical System) technology, which allowed the integration of highly desirable but complex functions into mobile phones, functions which depend on parameters beyond those purely electronic. This is the case, for example, with the navigation system (motion processing) in smartphones, which includes accelerometer, gyroscope, compass, etc. In each of these, some type of sensor is required, which is connected to some sort of electronic circuit, so they can together produce the desired information. In addition to the smartphone navigation system, the presentation includes also comparisons with navigational systems used in other applications, such as airplanes, missiles, and cars.
Volnei A. Pedroni received his Bachelor degree in Electrical Engineering from the Federal University of Rio Grande do Sul (UFRGS), Brazil, and both his MSc and PhD degrees in Electrical Engineering from the California Institute of Technology (Caltech), USA. His area of expertise is Microelectronics. The development and design of dedicated neural network chips for artificial intelligence (AI) was at the core of his PhD work. His areas of interest include ASICs, FPGAs, and VHDL, particularly for the implementation of mathematical algorithms. He has a number of publications in the field of Microelectronics, including two books by MIT Press: Circuit Design with VHDL and Finite State Machines in Hardware: Theory and Design, with VHDL and SystemVerilog. Mr. Pedroni did collaboration with Caltech (USA), University of Trento (Italy), and University of Modena (Italy). He retired from his Full Professor position at UTFPR (Federal Technological University of Parana), Brazil, in 2017, after which he took a regular Visiting Professor position in the Electrical Engineering Department of Caltech, responsible for the course EE125 Digital Electronics and Design with FPGAs and VHDL, plus student advising assignments.

14h

Digital media consumption has become a staple of everyday life, driven by recent technological advancements and video compression plays a vital role in this context. For example, an uncompressed Full HD video at 30 fps would require 1.3TB of storage, but current encoders achieve compression ratios over 450:1, enabling today's widespread video technology. Achieving high coding efficiency requires advanced techniques that come with significant computational costs, posing challenges for real-time high-resolution video compression, especially in battery-powered devices like smartphones, where power dissipation and energy consumption are critical factors. MICROELECTRONICS provides the solution for these challenges, since ALL devices able to reproduce and capture videos rely on dedicated hardware for compression and decompression. This lecture covers key video coding concepts, highlights two state-of-the-art encoders, showcases hardware from smartphone chipsets to high-performance servers, and discusses research at UFPel and future trends in visual signal compression.
Luciano Volcan Agostini is a Full Professor at the Federal University of Pelotas (UFPel), where he started in 2002. He is a CNPq Research Productivity Fellow - Level 1C. Currently, he holds the position of Vice President of the Brazilian Society of Microelectronics (SBMicro). He is also the Coordinator of the Computer Science and Information Advisory Committee of FAPERGS and a member of the Microelectronics Advisory Committee of CNPq. He is the founder and leader of the Video Technology Research Group (ViTech) at UFPel. He completed his post-doctorate at the University of Lisbon (2017-2018). He holds a Ph.D. (2007) and a master's degree (2002) in Computer Science from UFRGS and a bachelor's degree in Informatics from UFPel (1998). He was the Vice President for Research and Graduate Studies at UFPel from 2013 to 2017 and President of the Municipal Council of Science and Technology of Pelotas-RS from 2013 to 2017. He has received several best paper awards at international and national conferences and has participated in organizing numerous national and international events. He is an Associate Editor of IEEE TCSVT, IEEE OJCAS, and Frontiers in Imaging. His research focuses on hardware design for image and video compression, video compression algorithms, AV1, VVC, VP9, HEVC, and H.264/AVC encoders, 3D, 360, light fields, and point clouds coding, digital design with FPGAs and ASICs, and microelectronics. He is a Senior Member of IEEE and ACM and a member of SBC and SBMicro. Within IEEE, he is part of IEEE CAS, IEEE SP, and IEEE CS. In IEEE CAS, he is an elected member of VSPC-TC. He coordinates the Steering Committee of SBCCI and is a member of the Management Committee of CECCI/SBC. He is also a member of the ABNT/CB-021/CE 021 000 029 "Audio, Image, Multimedia, and Hypermedia Coding" Committee.

15h45

An important way to understand the operation of computer and electronic circuits and systems is to analyze how these circuits and systems are implemented. We will take a tour inside various chips, showing solutions from the physical level to the system level, solutions observed through reverse engineering of microprocessors, such as the Z8000, and that are not described in the literature. It also shows the use of visualization tools to understand how EDA algorithms and tools work in physical synthesis.
Ricardo Reis received a Bachelor degree in Electrical Engineering from Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil, in 1978, and a Ph.D. degree in Microelectronics from the National Polytechnic Institute of Grenoble (INPG), France, in 1983. Doctor Honoris Causa by the University of Montpellier in 2016. He is a full professor at the Informatics Institute of Federal University of Rio Grande do Sul. His main research includes physical design automation, design methodologies, fault tolerant systems and microelectronics education. He has more than 700 publications including books, journals and conference proceedings. He was vice-president of IFIP (International Federation for Information Processing) and he was also president of the Brazilian Computer Society (two terms) and vice-president of the Brazilian Microelectronics Society. He is an active member of CASS and he received the 2015 IEEE CASS Meritorious Service Award. He was vice-president of CASS for two terms (2008/2011). He is the founder of the Rio Grande do Sul CAS Chapter, which got the World CASS Chapter of The Year Award 2011, 2012, 2018 and 2022, and R9 Chapter of The Year 2013, 2014, 2016, 2017 and 2020. He is a founder of several conferences like SBCCI and LASCAS, the CASS Flagship Conference in Region 9. He was the General or Program Chair of several conferences like IEEE ISVLSI, SBCCI, IFIP VLSI-SoC, ICECS, PATMOS. Ricardo was the Chair of the IFIP/IEEE VLSI-SoC Steering Committee, vice-chair of the IFIP WG10.5 and he is Chair of IFIP TC10. he received the Researcher of the Year Award in the state of Rio Grande do Sul. He is a founding member of the SBC (Brazilian Computer Society) and also founding member of SBMicro (Brazilian Microelectronics Society). He was member of CASS DLP Program (2014/2015), and he has done more than 70 invited talks in conferences. He is the CASS representative at the IEEE IoT Technical Committee. Ricardo received the IFIP Fellow Award in 2021 and the ACM/ISPD Lifetime Achievement Award in 2022. He received the 2023 IEEE CASS John Choma Educational Award and the 2024 Best Associate Editor of IEEE CASS Magazine. He is also Distinguished Lecturer of IEEE CEDA (2024/2025).

13/12/2024
AUDITÓRIO I (INFERIOR) ENGENHARIA QUÍMICA

Dispositivo vestível embarcado para predição de crises convulsivas em pessoas com epilepsia
Bruna Henning Pereira, Cesar Albenes Zeferino
Projeto de uma micro-PCI multibanda e multipadrão para aplicações de IoT
J. V. Alvares, A. A. Mariano, B. Leite, M. Souza, A. L. T. Costa, G. H. Flach, L. N. Endrice, I. P. Adam, J. B. S. Martins
Conversores integrados híbridos: passive-stacked 3RD order (PS3) boost
Tales Aquino Henn, Juan Camilo Castellanos Rodriguez
Caracterização de um módulo de comunicação IoT multipadrão e multibanda
J. V. Alvares, A. A. Mariano, B. Leite, M. Souza, A. L. T. Costa, G. H. Flach, L. N. Endrice, I. P. Adam, J. B. S. Martins

Universidade Federal do Paraná
Jornada Paranaense de Microeletrônica

Departamento de Engenharia Elétrica, Centro Politécnico
81531-980 | Curitiba |
gics@ufpr.br
(41) 3361-3228
Universidade Federal do Paraná
Jornada Paranaense de Microeletrônica

Departamento de Engenharia Elétrica, Centro Politécnico
81531-980 | Curitiba |
gics@ufpr.br
(41) 3361-3228

UFPR nas Redes Sociais


UFPR nas Redes Sociais